- What is the Bus type? Examples CMSA/BA, CMSA/CD, master/slave, multiple masters etc.
Master/Slave
- What is the maximum number of nodes that the network can support?
512 nodes maximum , 254 nodes maximum Remote Bus nodes
- What is the Bus topology?
Tree/branch topology with 16 remote bus levels (branches)
- What is the maximum transmission distance without repeaters?
12.8 km (8 miles)
What baud rate is supported at this maximum distance? 500 k baud
- What types of transmission media are used and supported?
3 twisted pair + shield - Remote Bus
2 fibers, plastic or glass - Remote Bus (fiber)
Slip Ring - Remote Bus or Installation Remote Bus
Slotted Waveguide - Remote Bus
3 twisted pair + 3 power conductors + shield - Installation Remote Bus
5 conductor flat ribbon cable - ST Local Bus
2 conductor unshielded, untwisted - Loop Local Bus
3 interconnecting knife contacts - Inline Local Bus
- How many bits are allocated at a node for input and output data?
Up to 64 bytes of real time process data can be transferred/device per bus scan
4 to 512 bits per device (64 bytes) for Remote, ST/Inline Local Bus nodes
1 to 32 bits per device for Loop2 Local bus nodes
- How is the bus powered?
Remote Bus (RB) devices - 24 V dc external connection
Installation Remote Bus (IRB) devices - 24 V dc from 3 conductors in IRB cable
ST Local Bus devices - 9 V dc power from 2 conductors in ST local bus cable
Loop Local Bus devices - 24 V dc power from 2 conductors in Loop bus cable
Inline Local Bus devices - 7 V dc power from 2 interconnecting knife contacts
- If the bus provides power to field devices what current level is available?
Installation Remote Bus (IRB) devices - 24 V dc @ 4.5 A
ST Local Bus devices - 9 V dc @ 800 mA (ST bus terminal supplies power)
Loop Local Bus devices - 24 V dc @ 2 A (Loop bus terminal supplies power)
Inline Local Bus devices - 7 V dc @ 2 A (Inline bus terminal supplies power)
- How are node addresses set?
Automatic Physical Addressing - Master assigns each slave device the next available I/O memory address according to the physical order the slave devices are connected in.
Logical addressing - Master assigns each slave device to any available address in the masters I/O memory. The address is specified as a parameter in the logical addressing command.
Note: Slave devices do not require address switches or address programming.
- Does the bus provide duplicate address detection?
Physical addressing - Not necessary, duplicate addressing is not possible
Logical Addressing - Yes, error is returned by master if duplicate addresses are assigned
- Does the bus provide an address attendance check after the first scan?
Yes, after the ID scan the master monitors every slave device on every scan
The first scan is an Identification (ID) cycle. During this cycle all slave devices switch their Identification Code and Data Length information into the data ring. After the ID scan is complete the master has an image of the network in it's memory and knows the following about each slave device:
a.) Physical position in the data ring
b.) Device type (digital in, digital out, digital I /O, analog in, analog out, analog I/O, PCP, remote bus interface, local bus interface, device profile compliance)
c.) Process data length and PCP data length occupied in the data ring
- Does the bus provide a node configuration check after the first scan?
The master monitors every device's state on every scan in the following manner:
After the ID cycle, the master is in the Active state (Valid bus configuration) and waiting for the start bus command (start data cycles). Once data cycles are started the master is sending and receiving all the data in it's I/O memory on each scan in a full duplex manner. The first data leaving the master's data out port on each scan is the loopback word, a continuously changing value, which is shifted through each slave and arrives back at the Data In port of the master after a determined number of clocks. If the master does not receive the Loopback word in the number of clocks that it determined to be the length of the bus during the ID cycle, it immediately initiates diagnostics and reports the slave device number and type of error.
- Does the bus provide error detection and correction algorithms?
Yes, CRC error checking is performed at the end of every scan. If there is a CRC error, all outputs hold their state from the previous scan, and the master's input buffer memory is not transferred to the memory In area. There are no correction algorithms implemented because it is faster to just run another scan. If 32 CRC errors (default = 32, and is programmable) occur in a row, the master stops data transfer and indicates the network segment where the data has been destroyed. Because each device contains a repeater function, the master can exactly determine the segment of cabling where EMI has destroyed the data, or a slave device under voltage power problems.
- Can a node provide parameter programming? Examples: logic inversion and similar Boolean operations. Explain any extended capabilities.
No, the node can not directly perform the logic functions, but the master can perform bit/byte copy, inversion, and simple logic functions on every INTERBUS scan cycle independent of the PLC or PC's application program. This is useful to handle high speed events that occur faster than the scan time of the PLC or PC.
Examples of this functionality (Logic is solved on each INTERBUS scan):
a.) Copy a 32 bit encoder value to 10 slave devices.
b.) Start 30 Variable Frequency drives at the same time by setting a one bit object active in the output memory area that has been linked to the start bit of the 30 drives.
c.) Link a Proximity sensor to a motor contactor.
- What I/O granularity does the Bus support?
With current firmware, two point discrete and one point analog. Later versions of firmware will support one point discrete.
What minimum address space allocation does the bus provide?
With current firmware, two bits. Later versions of firmware will support one bit.
- What is the protocol efficiency of this Bus?
16 bit loopback word
32 bit end/control data
5 bits of frame data per 8 bits of user data
16 discrete I/O (1 analog I/O) = 21.6%
128 discrete I/O (8 analog I/O) = 50.0%
2048 discrete I/O (128 analog I/O) = 60.6%
4096 discrete I/O (256 analog I/O) = 61.1%
- Does the Bus support multiple protocols?
Yes, Process Data (PD) and Peripheral Communications Data (PCP). Process Data is the high speed I/O data transferred to/from all devices on each scan. PCP data is used to block transfer parameters to/from intelligent devices. Both Process Data and PCP Data are transferred at the same time, thus enabling a device to be parameterized without affecting the Process Data I/O update time.
- How many vendors support this technology?
> 1000
- What form factors are supported for network scanner cards?
PLC, PC ISA, PC 104, PCMCIA, VMEbus, STDbus, PLC vendors, Robot controllers
- What governing body controls this standard?
INTERBUS Club - Reference EN 50254
Are changes to the specification immediately released to all 3rd party vendors?
Changes are immediately integrated into the slave and master implementation manuals, which can be downloaded free of charge. Paper copies of the spec may be purchased
FAQ General Issues
